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1. A system comprising: a first system-on-a-chip (SoC); a second SoC coupled to the first SoC by an SoC communication channel; a microcontroller coupled to the first SoC by a first microcontroller communication channel and coupled to the second SoC by a second microcontroller communication channel, the microcontroller coupled to the first SoC by a second communication channel, each of the first SoC, the second SoC, and the microcontroller having a respective last plurality of partitions and a current plurality of partitions; and one or more update engines configured to provide an over-the-air (OTA) update to the first SoC, the second SoC, and the microcontroller by updating a respective current plurality of partitions on the first SoC, the second SoC, and the microcontroller, wherein the microcontroller is configured to perform recovery process comprising: detecting a communication error on one or more of the SoC communication channel, the first microcontroller communication channel, and the second microcontroller communication channel; and in response to detecting the communication error: verifying whether the first microcontroller communication channel and the second microcontroller communication channel are operable by checking whether the first microcontroller communication channel and the second microcontroller communication channel are functioning despite the detected communication error; and in response to detecting that both the first microcontroller communication channel and the second microcontroller communication channel are operable: setting respective active partitions for at least one of the first SoC, the second SoC and the microcontroller to the respective last plurality of partitions; and rebooting the first SoC, the second SoC, and the microcontroller.
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