US 12,313,673 B2
WLCSP device enclosure
Wenshui Zhang, Singapore (SG); Chee Teong Chang, Singapore (SG); and Paul Ashley Nathan, Singapore (SG)
Assigned to Silicon Laboratories Inc., Austin, TX (US)
Filed by Silicon Laboratories Inc., Austin, TX (US)
Filed on Jun. 26, 2023, as Appl. No. 18/214,090.
Prior Publication US 2024/0426900 A1, Dec. 26, 2024
Int. Cl. G01R 31/12 (2020.01); G01R 31/28 (2006.01)
CPC G01R 31/2862 (2013.01) [G01R 31/2865 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device enclosure comprising:
a base configured to receive a wafer level chip scale package (WLCSP) device, the base including through holes in a bottom of the base to allow electrical contacts of the WLCSP device to be exposed when the WLCSP device is mounted in the device enclosure;
a cover having a plurality of openings to allow ingress of air during testing; and
wherein the base and the cover are secured together by screws.