US 11,991,935 B2
Materials and methods for fabricating superconducting quantum integrated circuits
Daniel Yohannes, Stamford, CT (US); Mario Renzullo, Yonkers, NY (US); John Vivalda, Pleasantville, NY (US); and Alexander Kirichenko, Pleasantville, NY (US)
Assigned to SeeQC, Inc., Elmsford, NY (US)
Filed by SeeQC Inc., Elmsford, NY (US)
Filed on Nov. 21, 2022, as Appl. No. 17/990,864.
Application 17/990,864 is a continuation of application No. 17/307,931, filed on May 4, 2021, granted, now 11,800,814.
Claims priority of provisional application 63/034,367, filed on Jun. 3, 2020.
Prior Publication US 2023/0337553 A1, Oct. 19, 2023
Int. Cl. G11C 16/04 (2006.01); G11C 11/44 (2006.01); H10N 60/12 (2023.01); H10N 60/80 (2023.01); H10N 60/84 (2023.01); H10N 69/00 (2023.01)
CPC H10N 60/84 (2023.02) [G11C 11/44 (2013.01); H10N 60/12 (2023.02); H10N 60/805 (2023.02); H10N 69/00 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A superconducting integrated circuit configured to operate at a cryogenic temperature, comprising:
a substrate;
a plurality of Josephson junctions patterned from a plurality of stacked superconducting layers and intervening insulating layers, over a surface of the substrate, configured to switch at the cryogenic temperature;
the at least one intervening insulating layer configured to galvanically isolate the plurality of superconducting layers at the cryogenic temperature;
a kinetic inductance layer formed under the plurality of stacked superconducting lavers and patterned as a set of meander inductors defining a current distribution network for supplying current to the plurality of Josephson junctions, the kinetic inductance layer having a higher unit inductance than the respective plurality of superconductive layers at the cryogenic temperature; and
a patterned resistive layer, configured as damping elements for the plurality of Josephson junctions.