CPC H04N 19/593 (2014.11) [H04N 19/11 (2014.11); H04N 19/117 (2014.11); H04N 19/122 (2014.11); H04N 19/124 (2014.11); H04N 19/129 (2014.11); H04N 19/13 (2014.11); H04N 19/159 (2014.11); H04N 19/174 (2014.11); H04N 19/176 (2014.11); H04N 19/426 (2014.11); H04N 19/44 (2014.11); H04N 19/463 (2014.11); H04N 19/61 (2014.11); H04N 19/625 (2014.11); H04N 19/82 (2014.11); H04N 19/96 (2014.11)] | 3 Claims |
1. A decoding apparatus for an intra prediction, the decoding apparatus comprising:
a memory; and
at least one processor connected to the memory, the at least one processor configured to:
derive a first intra prediction mode based on a left neighboring block of a current block;
derive a second intra prediction mode based on an upper neighboring block of the current block;
determine an intra prediction mode for the current block based on the first intra prediction mode and the second intra prediction mode; and
generate prediction samples on the current block based on the determined intra prediction mode,
wherein when the upper neighboring block is not located in a current largest coding unit, LCU, in which the current block is located, the second intra prediction mode is set equal to an intra planar mode.
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