CPC H04L 51/21 (2022.05) [H04L 41/16 (2013.01); H04W 4/12 (2013.01)] | 27 Claims |
1. A processor-implemented method, comprising:
receiving a first message and a second message, wherein the second message comprises a message to be combined with the first message;
combining the first message and the second message into a combined message based on embedding the second message into the first message;
generating, through an encoder neural network, an emulation message based on the combined message, wherein the first message and the emulation message comprise valid messages when decoded by a first type of decoder; and
outputting the emulation message for transmission to a first receiving device having the first type of decoder and to a second receiving device having a second type of decoder, the second type of decoder being a neural network-based decoder corresponding to the encoder neural network.
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