US 11,991,118 B2
Reference signal reception and CQI computation method and wireless communication apparatus
Akihiko Nishio, Osaka (JP); Seigo Nakao, Osaka (JP); and Daichi Imamura, Saitama (JP)
Assigned to Sun Patent Trust, New York, NY (US)
Filed by Sun Patent Trust, New York, NY (US)
Filed on Jun. 23, 2023, as Appl. No. 18/340,725.
Application 18/340,725 is a continuation of application No. 17/848,297, filed on Jun. 23, 2022, granted, now 11,728,953.
Application 17/848,297 is a continuation of application No. 17/169,106, filed on Feb. 5, 2021, granted, now 11,398,891, issued on Jul. 26, 2022.
Application 17/169,106 is a continuation of application No. 16/716,094, filed on Dec. 16, 2019, granted, now 10,958,403, issued on Mar. 23, 2021.
Application 16/716,094 is a continuation of application No. 16/218,257, filed on Dec. 12, 2018, granted, now 10,547,433, issued on Jan. 28, 2020.
Application 16/218,257 is a continuation of application No. 15/673,090, filed on Aug. 9, 2017, granted, now 10,193,679, issued on Jan. 29, 2019.
Application 15/673,090 is a continuation of application No. 15/372,113, filed on Dec. 7, 2016, granted, now 9,762,370, issued on Sep. 12, 2017.
Application 15/372,113 is a continuation of application No. 15/264,219, filed on Sep. 13, 2016, granted, now 9,548,849, issued on Jan. 17, 2017.
Application 15/264,219 is a continuation of application No. 14/602,176, filed on Jan. 21, 2015, granted, now 9,473,282, issued on Oct. 18, 2016.
Application 14/602,176 is a continuation of application No. 13/144,665, granted, now 8,996,049, issued on Mar. 31, 2015, previously published as PCT/JP2010/000499, filed on Jan. 28, 2010.
Claims priority of application No. 2009-018284 (JP), filed on Jan. 29, 2009.
Prior Publication US 2023/0336317 A1, Oct. 19, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H04L 5/00 (2006.01); H04L 1/1812 (2023.01); H04W 72/0446 (2023.01); H04W 72/23 (2023.01); H04B 7/06 (2006.01); H04W 72/54 (2023.01)
CPC H04L 5/0057 (2013.01) [H04L 1/1812 (2013.01); H04L 5/0028 (2013.01); H04L 5/005 (2013.01); H04L 5/0051 (2013.01); H04L 5/0073 (2013.01); H04W 72/0446 (2013.01); H04W 72/23 (2023.01); H04B 7/0632 (2013.01); H04L 5/0012 (2013.01); H04L 5/0041 (2013.01); H04L 5/0082 (2013.01); H04W 72/54 (2023.01)] 26 Claims
OG exemplary drawing
 
1. An integrated circuit to control a process, the process comprising:
receiving a first reference signal that is mapped in a subframe and transmitted to a communication apparatus including the integrated circuit and compliant with a first communication system;
receiving a second reference signal that is mapped in all subframes and transmitted to the communication apparatus and another communication apparatus compliant with a second communication system; and
computing a channel quality indicator (CQI) based on the received first reference signal and the received second reference signal,
wherein the first reference signal is mapped in a same period as a period of semi-persistent scheduling (SPS) transmission, or in a period which is 1/N of a period of SPS transmission, where N is a positive integer.