CPC H04L 5/0053 (2013.01) [H04L 5/0092 (2013.01); H04W 72/0453 (2013.01)] | 5 Claims |
1. A terminal apparatus comprising:
reception circuitry configured to receive a higher layer parameter including multiple values of indexes of multiple interlaces assigned to the terminal apparatus;
processing circuitry configured to determine multiple first indexes of multiple physical resource blocks (PRBs) to which a physical uplink control channel (PUCCH) is mapped; and
transmitting circuitry configured to transmit the PUCCH in a bandwidth part (BWP), wherein
in a case that the PUCCH is transmitted using the multiple interlaces, the multiple first indexes are determined based on the multiple values of indexes of the multiple interlaces, a number of resource blocks (RBs) used for the multiple interlaces, a number of the multiple interlaces, and a number of the one or multiple PRBs from zero to a starting PRB of the BWP in a common resource block (CRB) index.
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