US 11,991,081 B1
Micro SID packet processing
Nancy Y. Shaw, Cupertino, CA (US); Sharada Yeluri, Cupertino, CA (US); Venkatraman Chandrasekaran, Cupertino, CA (US); Sri Karthik Goud Gadela, Cupertino, CA (US); and Swamy Sadashivaiah Renu Kananda, Sunnyvale, CA (US)
Assigned to Juniper Networks, Inc., Sunnyvale, CA (US)
Filed by Juniper Networks, Inc., Sunnyvale, CA (US)
Filed on Sep. 22, 2022, as Appl. No. 17/934,431.
Application 17/934,431 is a continuation of application No. 17/247,955, filed on Dec. 31, 2020, granted, now 11,477,119.
This patent is subject to a terminal disclaimer.
Int. Cl. H04L 45/745 (2022.01); H04L 45/02 (2022.01); H04L 45/12 (2022.01); H04L 69/22 (2022.01)
CPC H04L 45/745 (2013.01) [H04L 45/02 (2013.01); H04L 45/12 (2013.01); H04L 69/22 (2013.01)] 20 Claims
OG exemplary drawing
 
10. A first network device comprising:
processing circuitry coupled to a memory; and
a forwarding path, wherein at least a portion of the forwarding path is stored in the memory and is executable by the processing circuitry;
wherein the processing circuitry is configured to:
receive an advertisement originated by a second network device in a network, wherein the advertisement specifies a second micro segment identifier (SID) associated with the second network device; and
store, in a destination lookup table, a route entry comprising both a first micro SID associated with the first network device and the second micro SID to enable a determination of whether at least a portion of a header of a packet matches both the first micro SID and the second micro SID through a single lookup in the destination lookup table.