CPC H04L 25/4904 (2013.01) | 20 Claims |
1. A decoding apparatus comprising digital circuitry, the digital circuitry configured to:
receive data indicative of a demodulated digital signal;
generate a signal measurement for the demodulated digital signal, wherein the signal measurement comprises at least one signal length descriptive of: (i) a positive length between a first rising edge of the demodulated digital signal and a second consecutive rising edge of the demodulated digital signal or (ii) a negative length between a first falling edge of the demodulated digital signal and a second consecutive falling edge of the demodulated digital signal; and
generate at least one portion of an output bit stream for the demodulated digital signal based at least in part on the signal measurement.
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