US 11,991,025 B2
Transceiver parameter determination
Itamar Levin, Holon (IL); and Tali Warshavsky, Ramat Gan (IL)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Dec. 2, 2020, as Appl. No. 17/110,228.
Claims priority of provisional application 62/943,659, filed on Dec. 4, 2019.
Prior Publication US 2021/0119835 A1, Apr. 22, 2021
Int. Cl. H04L 25/03 (2006.01); G06F 13/42 (2006.01)
CPC H04L 25/03019 (2013.01) [G06F 13/4282 (2013.01); H04L 2025/03636 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A method for setting an equalizer tap setting and gain setting in a serializer/deserializer (SerDes), the method comprising:
determining an equalizer setting and gain setting by causing a mean-square error cost scheme tracking to lock to an offset from a minimum of a cost of the mean-square error cost scheme without pausing error cost tracking, wherein the determining the equalizer setting is based on a previous equalizer setting adjusted by a value based on sign values of error signal and data decisions, wherein the determining the equalizer setting comprises setting the equalizer setting to an achieved skew level or a negative of a target skew level, and wherein:
in a first configuration, the determining the equalizer setting comprises determining:
wi(k+1)=wi(k)+μ{1; sign(e(k))·sign(di(k))>0
μ{−ß; sign(e(k))·sign(di(k))<0,
where |1-β| comprises a value of the offset and
in a second configuration, the determining the equalizer setting comprises determining:
wi(k+1)=wj(k)+μ{α; sign(e(k))·sign(di(k))>0
μ{−(1−α); sign(e(k))·sign(di(k))<0,
where 1>α>0.