US 11,990,913 B2
Systems and methods for providing a delay-locked loop with coarse tuning technique
Chen Zhai, San Diego, CA (US); and Abbas Komijani, Mountain View, CA (US)
Assigned to Apple Inc., Cupertino, CA (US)
Filed by Apple Inc., Cupertino, CA (US)
Filed on Dec. 12, 2022, as Appl. No. 18/079,424.
Claims priority of provisional application 63/409,190, filed on Sep. 22, 2022.
Prior Publication US 2024/0106440 A1, Mar. 28, 2024
Int. Cl. H03L 7/081 (2006.01); H03L 7/085 (2006.01)
CPC H03L 7/0818 (2013.01) [H03L 7/085 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A delay-locked loop, comprising:
a phase detector;
a first loop comprising a loop filter coupled to the phase detector; and
a second loop comprising:
a plurality of switched capacitors; and
coarse tuning circuitry coupled to the plurality of switched capacitors and the phase detector.