US 11,990,910 B2
Control of bias current to a load
Harald Garvik, Trondheim (NO)
Assigned to Nordic Semiconductor ASA, Trondheim (NO)
Filed by Nordic Semiconductor ASA, Trondheim (NO)
Filed on Apr. 26, 2022, as Appl. No. 17/729,844.
Claims priority of application No. 2106009 (GB), filed on Apr. 27, 2021.
Prior Publication US 2022/0345119 A1, Oct. 27, 2022
Int. Cl. H03K 3/00 (2006.01); H03K 3/353 (2006.01); H03K 5/01 (2006.01); H03K 5/02 (2006.01)
CPC H03K 3/353 (2013.01) [H03K 5/01 (2013.01); H03K 5/023 (2013.01)] 14 Claims
OG exemplary drawing
 
1. A circuit portion comprising:
A load circuit portion comprising a first load transistor; and
a bias circuit portion comprising:
a first replica transistor matched to the first load transistor and connected to the first load transistor at a node such that when a current flows through the first replica transistor, a current proportional to the current through the first replica transistor flows through the first load transistor;
a current input for receiving an input current;
a supply voltage input for receiving a supply voltage; and
a feedback loop arranged to:
adjust a voltage at the node connecting the first replica transistor and the first load transistor such that the first replica transistor conducts a current proportional to the input current; and
counteract variations in the voltage at the node connecting the first replica transistor and the first load transistor arising from changes in the supply voltage;
wherein the first load transistor forms part of a load inverter, the first replica transistor forms part of a replica inverter, and the replica inverter is arranged to replicate the load inverter.