	US 11,990,904 B1
	Field Programmable Gate Array system
Kyeongryeol Bong, Seongnam-si (KR); and Juyeong Yoon, Seongnam-si (KR)
Assigned to REBELLIONS INC., Seongnam-si (KR)
Filed by REBELLIONS INC., Seongnam-si (KR)
Filed on Dec. 20, 2023, as Appl. No. 18/391,407.
Claims priority of application No. 10-2023-0145104 (KR), filed on Oct. 26, 2023.
Int. Cl. H03K 19/17736 (2020.01)

CPC H03K 19/1774 (2013.01)

20 Claims

1. A Field Programmable Gate Array (FPGA) system comprising:

a main FPGA; and

one or more sub-FPGAs connected to the main FPGA,

wherein the main FPGA is configured to:

detect a positive edge of a pulse included in a user clock using a sampling clock of the main FPGA;

generate a flag using the detected positive edge;

generate a clock packet indicating the generated flag; and

provide the generated clock packet to any one of the one or more sub-FPGAs.