US 11,990,541 B2
Apparatus and circuits with dual polarization transistors and methods of fabricating the same
Chan-Hong Chern, Palo Alto, CA (US)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Mar. 21, 2023, as Appl. No. 18/124,490.
Application 18/124,490 is a continuation of application No. 17/222,909, filed on Apr. 5, 2021, granted, now 11,631,760.
Application 17/222,909 is a continuation of application No. 16/576,554, filed on Sep. 19, 2019, granted, now 10,971,616.
Claims priority of provisional application 62/753,500, filed on Oct. 31, 2018.
Prior Publication US 2023/0231046 A1, Jul. 20, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 29/778 (2006.01); H01L 27/07 (2006.01); H01L 29/66 (2006.01); H03K 17/567 (2006.01)
CPC H01L 29/7787 (2013.01) [H01L 27/0727 (2013.01); H01L 29/66462 (2013.01); H03K 17/567 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor structure, comprising:
a substrate;
an active layer that is formed over the substrate and comprises a first active portion and a second active portion;
a first polarization modulation layer formed over the first active portion;
a second polarization modulation layer formed over the second active portion;
a first transistor formed over the active layer, wherein the first transistor comprises a first gate structure formed over the first polarization modulation layer; and
a second transistor formed over the active layer, wherein the second transistor comprises a second gate structure formed over the second polarization modulation layer, wherein the first and second polarization modulation layers modulate dipole concentrations in the first and second active portions, respectively.