CPC H01L 29/7311 (2013.01) [H01L 29/7391 (2013.01)] | 20 Claims |
1. A tunneling field effect transistor (TFET), comprising:
a drain region on a substrate;
a channel on the drain region;
a dipole formation layer (DFL) on the channel;
a source region on the DFL;
a gate insulation pattern surrounding the channel; and
a gate electrode surrounding the gate insulation pattern,
wherein the DFL contacts the channel and the source region and forms dipoles between the channel and the source region.
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