US 11,990,531 B2
Vertical tunneling field-effect transistor cell
Harry-Hay-Lay Chuang, Singapore (SG); Cheng-Cheng Kuo, Hsinchu (TW); and Ming Zhu, Singapore (SG)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on May 17, 2021, as Appl. No. 17/322,512.
Application 14/874,398 is a division of application No. 13/749,186, filed on Jan. 24, 2013, granted, now 9,159,826, issued on Oct. 13, 2015.
Application 17/322,512 is a continuation of application No. 16/579,110, filed on Sep. 23, 2019, granted, now 11,011,621.
Application 16/579,110 is a continuation of application No. 15/797,674, filed on Oct. 30, 2017, granted, now 10,424,652, issued on Sep. 24, 2019.
Application 15/797,674 is a continuation of application No. 14/874,398, filed on Oct. 3, 2015, granted, now 9,806,172, issued on Oct. 31, 2017.
Prior Publication US 2021/0296471 A1, Sep. 23, 2021
Int. Cl. H01L 29/66 (2006.01); H01L 29/06 (2006.01); H01L 29/739 (2006.01); H01L 29/78 (2006.01)
CPC H01L 29/66666 (2013.01) [H01L 29/0657 (2013.01); H01L 29/66356 (2013.01); H01L 29/7391 (2013.01); H01L 29/7827 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device comprising:
a semiconductor structure extending from a substrate, the semiconductor structure including:
a first region including a first dopant, the first region having a first portion disposed at a first level and a second portion disposed at a second level that is different than the first level;
a second region disposed over the first region, the second region including a second dopant that is different than the first dopant;
a gate dielectric layer interfacing with the second region without interfacing with the first portion of the first region, wherein the gate dielectric layer extends continuously from the second region to the second portion of the first region such that gate dielectric layer interfaces with the second portion of the first region;
a first contact interfacing with at least the first portion of the first region; and
an interlayer dielectric layer disposed over the substrate, the interlayer dielectric layer interfacing with the second region and the first contact.