US 11,990,522 B2
Effective work function tuning via silicide induced interface dipole modulation for metal gates
Yen-Tien Tung, Hsinchu (TW); Szu-Wei Huang, Hsinchu (TW); Zhi-Ren Xiao, Hsinchu (TW); Yin-Chuan Chuang, Hsinchu (TW); Yung-Chien Huang, Hsinchu (TW); Kuan-Ting Liu, Hsinchu (TW); Tzer-Min Shen, Hsinchu (TW); Chung-Wei Wu, Hsin-Chu County (TW); and Zhiqiang Wu, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu (TW)
Filed on Dec. 9, 2022, as Appl. No. 18/064,039.
Application 18/064,039 is a continuation of application No. 17/144,794, filed on Jan. 8, 2021, granted, now 11,527,622.
Prior Publication US 2023/0104442 A1, Apr. 6, 2023
Int. Cl. H01L 29/40 (2006.01); H01L 21/3205 (2006.01); H01L 29/423 (2006.01); H01L 29/49 (2006.01); H01L 29/51 (2006.01); H01L 29/786 (2006.01)
CPC H01L 29/401 (2013.01) [H01L 21/32053 (2013.01); H01L 29/42392 (2013.01); H01L 29/4966 (2013.01); H01L 29/517 (2013.01); H01L 29/78696 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor structure, comprising:
a substrate;
a first semiconductor channel layer over the substrate;
a high-k gate dielectric layer over the first semiconductor channel layer;
a work function metal layer over the high-k gate dielectric layer; and
a bulk metal layer over the work function metal layer, wherein the work function metal layer includes a first portion and a second portion over the first portion, wherein the first portion and the second portion both include a first type of metal element and a nitride, the first portion is doped with silicon at a first dopant concentration, and the second portion is not doped with silicon or is doped with silicon at a second dopant concentration lower than the first dopant concentration.