	US 11,990,521 B2
	Laminate, semiconductor device, and method for manufacturing laminate
Hiroshi Hashigami, Annaka (JP)
Assigned to SHIN-ETSU CHEMICAL CO., LTD., Tokyo (JP)
Filed by SHIN-ETSU CHEMICAL CO., LTD., Tokyo (JP)
Filed on Mar. 15, 2023, as Appl. No. 18/121,680.
Application 18/121,680 is a continuation of application No. 17/272,873, previously published as PCT/JP2019/035415, filed on Sep. 9, 2019.
Claims priority of application No. 2018-182714 (JP), filed on Sep. 27, 2018.
Prior Publication US 2023/0223446 A1, Jul. 13, 2023
Int. Cl. H01L 29/22 (2006.01); C01G 15/00 (2006.01); H01L 21/02 (2006.01); H01L 29/739 (2006.01); H01L 29/778 (2006.01); H01L 29/78 (2006.01)

CPC H01L 29/2206 (2013.01) [C01G 15/006 (2013.01); H01L 21/0242 (2013.01); H01L 21/02433 (2013.01); H01L 21/02483 (2013.01); H01L 21/02496 (2013.01); H01L 29/78 (2013.01); H01L 21/0262 (2013.01); H01L 29/7395 (2013.01); H01L 29/7786 (2013.01)]

15 Claims

1. A laminate comprising:

a crystal substrate;

a middle layer formed on a main surface of the crystal substrate, the middle layer comprising a mixture of an amorphous region in an amorphous phase and a crystal region in a crystal phase having a corundum structure mainly made of a first metal oxide; and

a crystal layer formed on the middle layer and having a corundum structure mainly made of a second metal oxide,

wherein the crystal region is an epitaxially grown layer from a crystal plane of the crystal substrate,

the middle layer further comprises silicon, and

a silicon concentration in the middle layer is 0.5 at % or more.