CPC H01L 29/0847 (2013.01) [H01L 21/823418 (2013.01); H01L 21/823431 (2013.01); H01L 21/823481 (2013.01); H01L 29/0649 (2013.01); H01L 29/66795 (2013.01); H01L 29/7851 (2013.01)] | 20 Claims |
1. A method of forming a semiconductor device, the method comprising:
forming a first gate structure over a first semiconductor fin and a second semiconductor fin, the first semiconductor fin and the second semiconductor fin protruding from a substrate;
forming a first recess in the first semiconductor fin adjacent the first gate structure and forming a second recess in the second semiconductor fin adjacent the first gate structure; and
forming a first source/drain region in the first recess and the second recess, the forming the first source/drain region comprising:
forming a first layer in the first recess and the second recess, the forming the first layer comprising forming a first portion of the first layer in the first recess and forming a second portion of the first layer in the second recess;
forming a second layer on the first layer by flowing a silane gas, the forming the second layer comprising forming a third portion of the second layer on the first portion of the first layer and forming a fourth portion of the second layer on the second portion of the first layer, wherein the third portion of the second layer and the fourth portion of the second layer are physically separated from each other; and
forming a third layer on the second layer, the forming the third layer comprising flowing a dichlorosilane gas, the third layer being a single continuous material extending from the third portion of the second layer to the fourth portion of the second layer, wherein forming the third layer comprises forming an air gap under the third layer, and wherein a top point of the air gap is above a top surface of the third portion of the second layer.
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