US 11,990,509 B2
Semiconductor devices having gate structures with slanted sidewalls
Shu-Han Chen, Hsinchu (TW); Tsung-Ju Chen, Hsinchu (TW); Chun-Heng Chen, Hsinchu (TW); and Chi On Chui, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jul. 18, 2022, as Appl. No. 17/866,986.
Application 17/866,986 is a division of application No. 16/881,916, filed on May 22, 2020, granted, now 11,430,865.
Claims priority of provisional application 62/967,237, filed on Jan. 29, 2020.
Prior Publication US 2022/0352313 A1, Nov. 3, 2022
Int. Cl. H01L 29/06 (2006.01); H01L 21/02 (2006.01); H01L 21/306 (2006.01); H01L 21/311 (2006.01); H01L 21/3115 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 21/265 (2006.01); H01L 29/10 (2006.01)
CPC H01L 29/0673 (2013.01) [H01L 21/0262 (2013.01); H01L 21/30604 (2013.01); H01L 21/31116 (2013.01); H01L 21/31155 (2013.01); H01L 29/66545 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01); H01L 21/26513 (2013.01); H01L 29/1083 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A structure comprising:
a nano-structure;
an epitaxial source/drain region adjacent the nano-structure;
a gate dielectric wrapped around the nano-structure;
a gate electrode over the gate dielectric, the gate electrode having an upper portion and a lower portion, a first width of the upper portion increasing continually in a first direction extending away from a top surface of the nano-structure, a second width of the lower portion being constant along the first direction; and
a gate spacer between the gate dielectric and the epitaxial source/drain region, the gate spacer having a first sidewall facing the epitaxial source/drain region and a second sidewall facing the gate dielectric, the first sidewall and the second sidewall of the gate spacer meeting at an apex.