US 11,990,507 B2
High voltage transistor structure
Chin-Hung Chen, Tainan (TW); Ssu-I Fu, Kaohsiung (TW); Chih-Kai Hsu, Tainan (TW); Chun-Ya Chiu, Tainan (TW); Chia-Jung Hsu, Tainan (TW); and Yu-Hsiang Lin, New Taipei (TW)
Assigned to United Microelectronics Corp., Hsinchu (TW)
Filed by United Microelectronics Corp., Hsinchu (TW)
Filed on Aug. 16, 2021, as Appl. No. 17/403,578.
Prior Publication US 2023/0047580 A1, Feb. 16, 2023
Int. Cl. H01L 29/06 (2006.01); H01L 29/10 (2006.01); H01L 29/78 (2006.01)
CPC H01L 29/0653 (2013.01) [H01L 29/1095 (2013.01); H01L 29/7816 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A high voltage transistor structure, comprising:
a substrate;
a first isolation structure and a second isolation structure disposed in the substrate;
a gate structure disposed on the substrate, at least a portion of the first isolation structure, and at least a portion of the second isolation structure;
a first source and drain region and a second source and drain region located in the substrate on two sides of the first isolation structure and the second isolation structure;
a first well region located in the substrate, wherein the first source and drain region is located in the first well region; and
a second well region located in the substrate, wherein the second source and drain region is located in the second well region, wherein
a depth of the first isolation structure is greater than a depth of the second isolation structure,
the gate structure is located directly above at least a portion of the first isolation structure and at least a portion of the second isolation structure, and
the first well region and the second well region are not located between the first isolation structure and the second isolation structure.