US 11,990,486 B2
Solid-state imaging device
Toshiaki Ono, Kanagawa (JP)
Assigned to Sony Semiconductor Solutions Corporation, Kanagawa (JP)
Appl. No. 17/261,061
Filed by SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
PCT Filed Jul. 9, 2019, PCT No. PCT/JP2019/027161
§ 371(c)(1), (2) Date Jan. 18, 2021,
PCT Pub. No. WO2020/026720, PCT Pub. Date Feb. 6, 2020.
Claims priority of application No. 2018-144065 (JP), filed on Jul. 31, 2018.
Prior Publication US 2021/0296382 A1, Sep. 23, 2021
Int. Cl. H01L 27/146 (2006.01); B60R 1/00 (2022.01); G02B 23/24 (2006.01); H04N 23/50 (2023.01); H04N 25/766 (2023.01)
CPC H01L 27/14605 (2013.01) [B60R 1/001 (2013.01); G02B 23/2407 (2013.01); H01L 27/14621 (2013.01); H04N 25/766 (2023.01); H04N 23/555 (2023.01)] 9 Claims
OG exemplary drawing
 
1. A solid-state imaging device, comprising:
a stacked photoelectric converter for each of a plurality of pixels, the stacked photoelectric converter having a plurality of photoelectric conversion elements stacked therein, the plurality of photoelectric conversion elements each having different wavelength selectivity; and
a plurality of first pixel circuits, wherein one first pixel circuit is provided for each of a plurality of groups, each first pixel circuit outputting a pixel signal based on an electric charge outputted from a corresponding one of a plurality of first photoelectric conversion elements of a plurality of the photoelectric conversion elements, each of the first photoelectric conversion elements having predetermined wavelength selectivity, the groups being obtained by dividing the plurality of the first photoelectric conversion elements into the plurality of groups, wherein
the solid-state imaging device further includes a plurality of drive wiring lines to which control signals are applied, the control signals being for controlling output of electric charges accumulated in the photoelectric conversion elements, and
each of the drive wiring lines is coupled to the first photoelectric conversion elements belonging to a first group and the first photoelectric conversion elements belonging to a second group in each of a plurality of unit pixel columns corresponding to shared first pixel circuits, the plurality of the first photoelectric conversion elements belonging to the first group and the plurality of the first photoelectric conversion elements belonging to the second group sharing the different first pixel circuits.