US 11,990,471 B2
Gate isolation for multigate device
Kuo-Cheng Chiang, Hsinchu County (TW); Shi Ning Ju, Hsinchu (TW); Guan-Lin Chen, Hsinchu County (TW); Kuan-Ting Pan, Taipei (TW); and Chih-Hao Wang, Hsinchu County (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu (TW)
Filed on Aug. 10, 2022, as Appl. No. 17/884,694.
Application 17/884,694 is a division of application No. 17/199,777, filed on Mar. 12, 2021, granted, now 11,637,102.
Claims priority of provisional application 63/032,178, filed on May 29, 2020.
Prior Publication US 2022/0384429 A1, Dec. 1, 2022
Int. Cl. H01L 27/088 (2006.01); H01L 21/762 (2006.01); H01L 21/8234 (2006.01); H01L 21/8238 (2006.01); H01L 27/092 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/51 (2006.01); H01L 29/66 (2006.01); H01L 29/786 (2006.01)
CPC H01L 27/088 (2013.01) [H01L 21/76224 (2013.01); H01L 29/42392 (2013.01); H01L 29/78696 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device comprising:
a first multigate device having:
a first channel layer disposed between first source/drain features, and
a first metal gate that surrounds the first channel layer;
a second multigate device having:
a second channel layer disposed between second source/drain features, and
a second metal gate that surrounds the second channel layer; and
a gate isolation fin disposed between and separating the first metal gate and the second metal gate, wherein the gate isolation fin includes:
a first dielectric layer having a first dielectric constant, wherein the first dielectric layer has a bottom portion having a first thickness and sidewall portions having a second thickness, wherein the second thickness is less than the first thickness, and
a second dielectric layer disposed over the first dielectric layer, wherein the second dielectric layer has a second dielectric constant that is less than the first dielectric constant.