| CPC H01L 23/535 (2013.01) [H01L 21/0217 (2013.01); H01L 21/76805 (2013.01); H01L 21/76831 (2013.01); H01L 21/76895 (2013.01); H01L 23/53214 (2013.01); H01L 23/53228 (2013.01); H01L 23/53242 (2013.01); H01L 23/53257 (2013.01); H01L 23/5329 (2013.01)] | 18 Claims |
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1. A method for making a semiconductor device, comprising in sequential order of:
forming a source/drain region in a semiconductor substrate;
forming a gate structure and a conductive segment in a first dielectric layer, the first dielectric layer being disposed on the semiconductor substrate, the conductive segment being disposed to be in electrical contact with the source/drain region, the gate structure and the conductive segment being separated from each other;
forming an etch stop layer over the first dielectric layer opposite to the semiconductor substrate, the etch stop layer having a first part and a second part that is at a same level as the first part, the first part being disposed above the gate structure, the second part being in direct contact with the conductive segment;
forming a second dielectric layer over the etch stop layer;
forming an opening that penetrates the second dielectric layer into the etch stop layer in a manner that the second part of the etch stop layer is recessed and exposed from the opening, the recessed second part being disposed to prevent the conductive segment from being exposed from the opening;
forming a silicon nitride-based layer along an inner surface of the opening;
removing the recessed second part of the etch stop layer and a portion of the silicon nitride-based layer that is formed on the recessed second part of the etch stop layer so as to expose the conductive segment; and
filling the opening with a conductive structure in such a manner that the conductive structure is in direct contact with the conductive segment and that the silicon nitride-based layer surrounds the conductive structure and is connected between the conductive structure and the second dielectric layer,
wherein:
an upper surface of the gate structure is at a level which is not higher than an upper surface of the conductive segment;
the conductive segment is made of Co, W, Ru, Ti, Ta, or combinations thereof;
during formation of the silicon nitride-based layer, the silicon nitride-based layer is conformally formed along the inner surface of the opening and is further conformally formed on a top surface of the second dielectric layer; and
during removal of the portion of the silicon nitride-based layer, another portion of the silicon nitride-bated layer is removed from the top surface of the second dielectric layer.
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