	US 11,990,409 B2
	Semiconductor device with fine metal lines for BEOL structure and method of manufacturing the same
Taeyong Bae, Albany, NY (US); and Hoonseok Seo, Niskayuna, NY (US)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Jun. 22, 2021, as Appl. No. 17/354,593.
Claims priority of provisional application 63/176,688, filed on Apr. 19, 2021.
Prior Publication US 2022/0336352 A1, Oct. 20, 2022
Int. Cl. H01L 23/528 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01)

CPC H01L 23/5283 (2013.01) [H01L 21/76877 (2013.01); H01L 23/5226 (2013.01); H01L 23/528 (2013.01)]

14 Claims

1. A semiconductor device comprising a front-end-of-line (FEOL) structure and a back-end-of-line (BEOL) structure connected to the FEOL structure,

wherein the FEOL structure comprises at least one source/drain region and at least one gate structure, and

wherein the BEOL structure comprises:

a plurality of 1^stfine metal lines arranged in a row at a same pitch, each of the plurality of 1^stfine metal lines having a same width;

at least one 1^stwide metal line formed at a side of the plurality of 1^stfine metal lines, the 1^stwide metal line having a width greater than the width of the 1^stfine metal line;

a 2^ndfine metal line at a side of the 1^stwide metal line opposite to the 1^stfine metal lines; and

a 3^rdfine metal line at a side of the 2^ndfine metal line opposite to the 1^stwide metal line,

wherein no other metal lines are present between the 2^ndfine metal line and the 3^rdfine metal line at a same level,

wherein a width of a space between the 2^ndfine metal line and the 3^rdfine metal line is greater than the width of the space between the two adjacent 1^stfine metal lines, and

wherein each of the plurality of 1^stfine metal lines comprises a material different from a material included in the 1^stwide metal line.