US 11,990,379 B2
Array substrate, manufacturing method thereof, and short circuit repair method
Peijian Yan, Shenzhen (CN)
Assigned to SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD., Shenzhen (CN)
Appl. No. 17/425,675
Filed by SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD., Shenzhen (CN)
PCT Filed May 24, 2021, PCT No. PCT/CN2021/095404
§ 371(c)(1), (2) Date Jul. 23, 2021,
PCT Pub. No. WO2022/166036, PCT Pub. Date Aug. 11, 2022.
Claims priority of application No. 202110163566.6 (CN), filed on Feb. 5, 2021.
Prior Publication US 2023/0369138 A1, Nov. 16, 2023
Int. Cl. H01L 21/66 (2006.01); H01L 27/12 (2006.01); G02F 1/1362 (2006.01); G02F 1/1368 (2006.01)
CPC H01L 22/20 (2013.01) [H01L 27/124 (2013.01); H01L 27/1244 (2013.01); H01L 27/1288 (2013.01); G02F 1/136259 (2013.01); G02F 1/1368 (2013.01)] 20 Claims
OG exemplary drawing
 
7. A manufacturing method of an array substrate, comprising following steps:
providing a substrate;
forming a first metal layer on the substrate;
etching the first metal layer to form a hollow area;
forming a gate insulation layer on the first metal layer;
forming a semiconductor layer on the gate insulation layer, wherein the semiconductor layer comprises a first area and a second area, and a vertical projection of an area between the first area and the second area on the substrate completely covers a vertical projection of the hollow area on the substrate; and
forming a second metal layer on the semiconductor layer;
wherein the first metal layer, the gate insulation layer, the semiconductor layer, and the second metal layer together become at least one switch unit, each of the switch unit comprises a plurality of thin film transistors (TFTs) in parallel, and each of the switch unit comprises at least two columns of a first TFT set and at least two columns of a second TFT set.