US 11,990,378 B2
Semiconductor device and method
Chien-Yuan Chen, Hsinchu (TW); Jui-Ping Lin, Hsinchu (TW); Chen-Ming Lee, Yangmei (TW); Fu-Kai Yang, Hsinchu (TW); and Mei-Yun Wang, Chu-Pei (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Mar. 24, 2023, as Appl. No. 18/189,437.
Application 18/189,437 is a continuation of application No. 17/705,943, filed on Mar. 28, 2022, granted, now 11,615,991.
Application 17/705,943 is a continuation of application No. 16/884,972, filed on May 27, 2020, granted, now 11,289,383, issued on Mar. 29, 2022.
Prior Publication US 2023/0230885 A1, Jul. 20, 2023
Int. Cl. H01L 21/8238 (2006.01); H01L 21/033 (2006.01); H01L 21/311 (2006.01); H01L 27/092 (2006.01)
CPC H01L 21/823821 (2013.01) [H01L 21/0337 (2013.01); H01L 21/31144 (2013.01); H01L 21/823871 (2013.01); H01L 27/0924 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
depositing a first inter-layer dielectric over an unused region of a first semiconductor fin and over a source/drain region, the source/drain region formed in a second semiconductor fin;
forming a cut mask over the first inter-layer dielectric, the cut mask comprising a trim portion, the trim portion overlapping the unused region in a top-down view;
forming a line mask over the cut mask, the line mask comprising a slot opening, the slot opening overlapping the unused region and the source/drain region in the top-down view;
extending the slot opening through a portion of the first inter-layer dielectric uncovered by the line mask and the cut mask to form a contact opening exposing the source/drain region; and
forming a first contact in the contact opening, the first contact contacting the source/drain region.