US 11,990,376 B2
Selective dual silicide formation
Peng-Wei Chu, Hsinchu (TW); Sung-Li Wang, Hsinchu County (TW); and Yasutoshi Okuno, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Jul. 29, 2022, as Appl. No. 17/816,039.
Application 17/226,822 is a division of application No. 16/354,259, filed on Mar. 15, 2019, granted, now 10,978,354.
Application 17/816,039 is a continuation of application No. 17/226,822, filed on Apr. 9, 2021, granted, now 11,482,458.
Prior Publication US 2022/0375797 A1, Nov. 24, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 21/8238 (2006.01); H01L 21/285 (2006.01); H01L 27/092 (2006.01)
CPC H01L 21/823814 (2013.01) [H01L 21/28518 (2013.01); H01L 27/0924 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor structure, comprising:
an N-type transistor that includes:
a first fin structure comprising a source/drain region;
a first transition source/drain feature disposed over the source/drain region of the first fin structure;
a first source/drain feature disposed on the first transition source/drain feature; and
a metal germanide layer disposed on the first source/drain feature,
wherein the first transition source/drain feature and the first source/drain feature comprises silicon and an n-type dopant,
wherein a concentration of the n-type dopant in the first transition source/drain feature is smaller than a concentration of the n-type dopant in the first source/drain feature.