US 11,990,351 B2
Semiconductor package and manufacturing method thereof
Jiun-Ting Chen, Hsinchu (TW); Chih-Wei Wu, Yilan County (TW); Szu-Wei Lu, Hsinchu (TW); Tsung-Fu Tsai, Changhua County (TW); Ying-Ching Shih, Hsinchu (TW); Ting-Yu Yeh, Hsinchu (TW); and Chen-Hsuan Tsai, Taitung (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Mar. 26, 2021, as Appl. No. 17/213,241.
Prior Publication US 2022/0310411 A1, Sep. 29, 2022
Int. Cl. H01L 23/13 (2006.01); H01L 21/304 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 25/065 (2023.01); H01L 25/18 (2023.01); H01L 23/14 (2006.01); H01L 23/48 (2006.01)
CPC H01L 21/561 (2013.01) [H01L 21/3043 (2013.01); H01L 23/13 (2013.01); H01L 23/3135 (2013.01); H01L 25/0655 (2013.01); H01L 25/18 (2013.01); H01L 21/563 (2013.01); H01L 23/147 (2013.01); H01L 23/3185 (2013.01); H01L 23/3192 (2013.01); H01L 23/481 (2013.01); H01L 24/73 (2013.01); H01L 24/97 (2013.01); H01L 2224/73204 (2013.01)] 20 Claims
OG exemplary drawing
 
16. A semiconductor package, comprising:
an interposer having a first surface, a second surface opposite to the first surface and slant sidewalls extending from the second surface, wherein the interposer includes a substrate, conductive vias embedded within the substrate and a redistribution layer disposed on the substrate;
semiconductor dies, disposed on the first surface of the interposer and electrically connected with the interposer;
an encapsulant, disposed over the interposer and laterally encapsulating the semiconductor dies;
connectors, disposed on the second surface of the interposer and on the conductive vias; and
an insulative protection layer, disposed on the second surface of the interposer and surrounding the connectors, wherein the insulative protection layer has a peripheral drape portion physically contacts and covers the slant sidewalls of the interposer.