US 11,990,340 B2
Semiconductor device and method of manufacturing the same
ChihCheng Liu, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed on Jun. 8, 2021, as Appl. No. 17/342,508.
Application 17/342,508 is a continuation of application No. PCT/CN2020/111399, filed on Aug. 26, 2020.
Claims priority of application No. 201911134775.7 (CN), filed on Nov. 19, 2019.
Prior Publication US 2021/0296126 A1, Sep. 23, 2021
Int. Cl. H01L 21/033 (2006.01); H01L 21/768 (2006.01); H10B 12/00 (2023.01)
CPC H01L 21/0337 (2013.01) [H01L 21/0332 (2013.01); H01L 21/76802 (2013.01); H10B 12/01 (2023.02)] 6 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor device, comprising:
providing a layer to be etched;
forming a patterned first mask layer on the layer to be etched, wherein the first mask layer comprises a plurality of first strip masks disposed parallel to each other
forming a patterned second mask layer on the layer to be etched, wherein the second mask layer comprises a plurality of second strip masks disposed parallel to each other, wherein the second mask layer and the first mask layer jointly defining openings to expose the layer to be etched and the plurality of first strip masks and the plurality of second strip masks are alternately disposed in parallel; and
etching the layer to be etched using the first mask layer and the second mask layer as masks thus forming a pattern to be etched;
wherein both sides of a first strip mask or both sides of a second strip mask comprise recesses that are arranged at regular intervals, wherein the recesses of the first strip mask jointly define the openings with the corresponding second strip mask, or the recesses of the second strip mask jointly define the openings with the corresponding first strip mask;
wherein the recesses are defined in a top view; wherein shape of the recesses comprises a triangle, an arc, or a rectangle.