| CPC G11C 16/08 (2013.01) [G11C 16/0483 (2013.01); G11C 16/10 (2013.01); G11C 16/16 (2013.01)] | 19 Claims |
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1. An apparatus comprising:
one or more three-dimensional memory structures, each comprising blocks having word lines and NAND strings, wherein the NAND strings in a block comprise memory cells connected to the word lines of the block, wherein the word lines comprise a first set of data word lines in a first region of the block, a second set of data word lines in a second region of the block and reconfigurable word lines between the first set and the second set; and
one or more control circuits in communication with the one or more memory structures, wherein the one or more control circuits are configured to:
operate a first block in a sub-block mode in which the reconfigurable word lines in the first block are used as dummy word lines that provide electrical isolation between the first region and the second region in the first block, wherein the first region comprises an upper sub-block and the second region comprises a lower sub-block in the sub-block mode; and
operate a second block in a full-block mode in which the reconfigurable word lines in the second block are used as data word lines.
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