US 11,989,815 B2
Cluster of scalar engines to accelerate intersection in leaf node
Prasoonkumar Surti, Folsom, CA (US); Carsten Benthin, Voelklingen (DE); Karthik Vaidyanathan, San Francisco, CA (US); Philip Laws, Santa Clara, CA (US); Scott Janus, Loomis, CA (US); and Sven Woop, Völklingen (DE)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by INTEL CORPORATION, Santa Clara, CA (US)
Filed on Feb. 22, 2022, as Appl. No. 17/677,118.
Application 17/677,118 is a continuation of application No. 16/910,434, filed on Jun. 24, 2020, granted, now 11,263,799.
Application 16/910,434 is a continuation of application No. 16/235,893, filed on Dec. 28, 2018, granted, now 10,699,465, issued on Jun. 30, 2020.
Prior Publication US 2022/0254090 A1, Aug. 11, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G06T 15/00 (2011.01); G06T 1/20 (2006.01); G06T 15/06 (2011.01)
CPC G06T 15/005 (2013.01) [G06T 1/20 (2013.01); G06T 15/06 (2013.01); G06T 2210/52 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
storing program code in a plurality of cores;
executing, by a plurality of execution engines, work that is offloaded from the plurality of cores upon execution of the program code, wherein the offloaded work comprises ray tracing operations; and
storing, in a memory accessible to both of the plurality of cores and the plurality of execution engines, execution results of the offloaded work including the ray tracing operations from the plurality of execution engines, wherein the execution results of the offloaded work are provided to the plurality of cores.