US 11,989,607 B2
Systems and methods for use of capacitive member to prevent chip fraud
Daniel Herrington, New York, NY (US); Stephen Schneider, Midlothian, VA (US); and Tyler Maiman, Melville, NY (US)
Assigned to CAPITAL ONE SERVICES, LLC, McLean, VA (US)
Filed by Capital One Services, LLC, McLean, VA (US)
Filed on Jun. 28, 2022, as Appl. No. 17/852,019.
Application 17/852,019 is a continuation of application No. 17/194,024, filed on Mar. 5, 2021, granted, now 11,403,503.
Application 17/194,024 is a continuation of application No. 16/723,792, filed on Dec. 20, 2019, granted, now 10,977,539, issued on Apr. 13, 2021.
Prior Publication US 2022/0327344 A1, Oct. 13, 2022
Int. Cl. G06K 19/073 (2006.01); H01L 23/00 (2006.01)
CPC G06K 19/07318 (2013.01) [H01L 23/573 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of preventing chip fraud, the method comprising the steps of:
positioning a chip at least partially within a substrate, the chip comprising a memory storing an applet;
coupling a capacitance member to a surface of the chip, wherein the capacitance member comprises a capacitance value;
detecting, by the applet, the capacitance value of the capacitance member; and
issuing, by the applet, a fraud alert upon detecting a change in the capacitance value greater than a predetermined amount, wherein
the substrate comprises a chip pocket,
the chip is disposed in the chip pocket,
the capacitance member is positioned in the chip pocket and beneath the chip,
the chip pocket comprises one or more peaks and one or more valleys,
the capacitance member is coupled to the surface of the chip through one or more connections, and
the one or more connections are disposed within adhesives that completely or partially fill air gaps between the one or more peaks and one or more valleys.