CPC G06F 3/0625 (2013.01) [G06F 1/3243 (2013.01); G06F 3/0611 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01)] | 20 Claims |
1. A non-volatile storage system, comprising:
a first interface configured to couple the non-volatile storage system to a host;
a non-volatile memory device;
a storage controller comprising a command queue and a processor; and
a second interface coupling the storage controller and the non-volatile memory device, wherein the processor is configured to:
handle data transfer requests from the host in an active power state;
monitor the command queue and a data transfer rate on a data bus of the first interface;
determine that the data transfer rate falls below a predetermined threshold and there is no command in the command queue;
enter a pseudo-idle power state in which input and output (IO) drivers of the second interface is turned off but a power domain for an on-chip internal memory of the storage controller is kept on;
determine that there is a new command in the command queue from the host; and
exit the pseudo-idle power state and enter the active power state.
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