US 11,989,421 B2
Adjustable data protection scheme using artificial intelligence
Ezra E. Hartz, Meridian, ID (US); Nicolas Soberanes, Boise, ID (US); Joseph A. De La Cerda, Boise, ID (US); Benjamin Rivera, Boise, ID (US); and Bruce J. Ford, Meridian, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Aug. 19, 2021, as Appl. No. 17/406,997.
Prior Publication US 2023/0058813 A1, Feb. 23, 2023
Int. Cl. G06F 3/06 (2006.01); G06F 21/62 (2013.01)
CPC G06F 3/0619 (2013.01) [G06F 3/0629 (2013.01); G06F 3/0679 (2013.01); G06F 21/6218 (2013.01)] 25 Claims
OG exemplary drawing
 
1. An apparatus comprising:
a plurality of memory devices implementing a data protection scheme;
an artificial intelligence (AI) accelerator coupled to the plurality of memory devices;
wherein the AI accelerator is configured to:
receive failure data for the plurality of memory devices;
receive an indication of a failure of a stripe of the plurality of memory devices based on the failure data;
based on failure data, and the indication of the failure of the stripe of the plurality of memory devices, generate a data protection scheme adjustment for the plurality of memory devices;
wherein the plurality of memory devices are configured to:
receive the data protection scheme adjustment from the AI accelerator; and
implement the data protection scheme adjustment; and
generate additional data protection scheme adjustments for a plurality of blocks of the plurality of memory devices based on cycle counts of the plurality of blocks of the plurality of memory devices and based on raw bit-error rates of the plurality of blocks of the plurality of memory devices,
wherein the plurality of blocks have erase latencies and program latencies that are similar to an erase latency corresponding to the failure data and a program latency corresponding to the failure data.