US 11,989,335 B2
Processing circuit and processing method thereof
Cheng-Chih Wang, Hsinchu (TW)
Assigned to NUVOTON TECHNOLOGY CORPORATION, Hsinchu Science Park (TW)
Filed by Nuvoton Technology Corporation, Hsinchu (TW)
Filed on Dec. 30, 2020, as Appl. No. 17/137,963.
Claims priority of application No. 109121499 (TW), filed on Jun. 24, 2020.
Prior Publication US 2021/0406408 A1, Dec. 30, 2021
Int. Cl. G06F 21/00 (2013.01); G06F 1/06 (2006.01); G06F 1/08 (2006.01); G06F 21/75 (2013.01); H03K 21/08 (2006.01)
CPC G06F 21/755 (2017.08) [G06F 1/06 (2013.01); G06F 1/08 (2013.01); H03K 21/08 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A processing circuit, comprising:
a first oscillation circuit receiving an input voltage and generating a first clock signal according to the input voltage;
a second oscillation circuit receiving an output voltage and generating a second clock signal according to the output voltage;
a counting circuit receiving the output voltage, wherein the counting circuit adjusts a first counter value according to the first clock signal and adjusts a second counter value according to the second clock signal; and
a control circuit receiving the output voltage and determining whether the input voltage is experiencing an attack according to the first counter value and the second counter value,
wherein:
the first oscillation circuit operates in an un-protected power domain, and
the second oscillation circuit, the counting circuit, and the control circuit operate in a protected power domain.