CPC G06F 13/1668 (2013.01) [G06F 12/0646 (2013.01); G06F 12/0815 (2013.01); G06F 12/0837 (2013.01); G06F 12/0862 (2013.01); G06F 12/0868 (2013.01); G06F 12/1466 (2013.01); G06F 13/1642 (2013.01); G06F 13/1673 (2013.01); G06F 13/4022 (2013.01); G06F 13/4221 (2013.01); G06F 2213/0026 (2013.01); G06N 20/00 (2019.01)] | 20 Claims |
1. A system comprising:
a first server device comprising:
a first memory device; and
a first cache coherent switch on chip, communicatively coupled to the first memory device via a Compute Express Link (CXL) protocol; and
a second server device, communicatively coupled to the first server device via a data connection, the second server device comprising:
a second memory device; and
a second cache coherent switch on chip, communicatively coupled to the second memory device via the CXL protocol and communicatively coupled to the first cache coherent switch on chip by the data connection via the CXL protocol, wherein the first cache coherent switch on chip and the second cache coherent switch on chip are configured to pool the first memory device and the second memory device.
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