US 11,989,135 B2
Programmable address range engine for larger region sizes
Farah E. Fargo, Hudson, MA (US); Mitchell Diamond, Shrewsbury, MA (US); David Keppel, Mountain View, CA (US); Samantika S. Sury, Westford, MA (US); Binh Pham, Burlingame, CA (US); and Shobha Vissapragada, Hudson, MA (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Feb. 10, 2020, as Appl. No. 16/786,815.
Prior Publication US 2020/0233814 A1, Jul. 23, 2020
Int. Cl. G06F 12/10 (2016.01); G06F 12/1027 (2016.01)
CPC G06F 12/1027 (2013.01) [G06F 2212/657 (2013.01)] 15 Claims
OG exemplary drawing
 
1. A method comprising:
allocating one or more pools in one or more memory devices;
receiving a request to allocate a specified custom range in a pool of the one or more pools;
allocating the custom range in the pool;
generating a custom range entry, using a driver, for use to provide a physical address translation for a subsequent request related to the custom range;
receiving a memory transaction with an associated virtual address;
determining a physical address translation of the virtual address based on the custom range entry and a page table entry of a translation lookaside buffer (TLB); and
issuing a memory access request associated with the determined physical address to a memory device of the one or more memory devices.