US 11,989,129 B2
Multiple virtual NUMA domains within a single NUMA domain via operating system interface tables
Kyle Delehanty, Austin, TX (US); Sridharan Sakthivelu, DuPont, WA (US); Janardhana Yoga Narasimhaswamy, Portland, OR (US); Vijay Bahirji, Hillsboro, OR (US); and Toby Opferman, Beaverton, OR (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Aug. 6, 2020, as Appl. No. 16/986,490.
Prior Publication US 2021/0019260 A1, Jan. 21, 2021
Int. Cl. G06F 12/0846 (2016.01); G06F 9/455 (2018.01); G06F 9/50 (2006.01); G06F 12/0806 (2016.01); G06F 12/0871 (2016.01)
CPC G06F 12/0851 (2013.01) [G06F 9/45533 (2013.01); G06F 9/5016 (2013.01); G06F 12/0806 (2013.01); G06F 12/0871 (2013.01); G06F 2009/45583 (2013.01); G06F 2212/2542 (2013.01)] 22 Claims
OG exemplary drawing
 
1. A computing system comprising:
a socket;
a processor coupled to the socket; and
a memory coupled to the processor, the memory including a set of executable program instructions, which when executed by the processor, cause the processor to:
identify a non-uniform memory access (NUMA) node,
define a first virtual proximity domain within the NUMA node, and
define a second virtual proximity domain within the NUMA node, wherein the first virtual proximity domain and the second virtual proximity domain are defined via one or more operating system (OS) interface tables,
wherein the socket is to have one or more of:
(a) an initial interleave configuration, wherein to define the first virtual proximity domain and the second virtual proximity domain, the instructions, when executed, cause the processor to maintain the initial interleave configuration, or
(b) an initial cache grouping, wherein to define the first virtual proximity domain and the second virtual proximity domain, the instructions, when executed, cause the processor to maintain the initial cache grouping.