US 11,989,126 B2
Tracking memory modifications at cache line granularity
David Boles, Austin, TX (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on May 13, 2022, as Appl. No. 17/744,332.
Prior Publication US 2023/0367712 A1, Nov. 16, 2023
Int. Cl. G06F 12/00 (2006.01); G06F 3/06 (2006.01); G06F 12/0802 (2016.01)
CPC G06F 12/0802 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0656 (2013.01); G06F 3/0679 (2013.01); G06F 2212/60 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A system comprising:
a memory device; and
a processing device, operatively coupled with the memory device, to perform operations comprising:
receiving a base address for a physical memory region;
receiving a list of empty log memory buffers;
responsive to determining that a cache line in the physical memory region is in a modified state, storing the modified cache line and metadata associated with the modified cache line in an active log memory buffer referenced by the list of empty log memory buffers;
determining that the active log memory buffer is full; and
associating a flag with the active log memory buffer, thereby indicating the active log memory buffer as a full log memory buffer; and
sending a status message to a host processor, the status message comprising at least one of a completion status or a session identifier of a logging session.