US 11,989,107 B2
Application of dynamic trim strategy in a die-protection memory sub-system
Tingjun Xie, Milpitas, CA (US); and Charles See Yeung Kwong, Redwood City, CA (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jul. 8, 2022, as Appl. No. 17/860,289.
Application 17/860,289 is a continuation of application No. 16/534,772, filed on Aug. 7, 2019, granted, now 11,403,195.
Prior Publication US 2022/0342784 A1, Oct. 27, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 11/20 (2006.01); G06F 3/06 (2006.01)
CPC G06F 11/2094 (2013.01) [G06F 3/0619 (2013.01); G06F 3/0659 (2013.01); G06F 3/0673 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system comprising:
a memory device comprising a plurality of memory dies and at least a first spare memory die; and
a processing device coupled to the memory device, the processing device to perform operations comprising:
tracking a value of a write counter representing a number of write operations performed at the plurality of memory dies;
activating the first spare memory die in response to detecting a failure of a first memory die of the plurality of memory dies;
storing an offset value of the write counter in response to activating the first spare memory die; and
commanding the memory device to modify die trim settings of the first spare memory die at predetermined check point values of the write counter that are offset from the offset value, wherein the die trim settings comprise values related to parameters and specification requirements associated with media characteristics that change as the first spare memory die ages.