CPC G06F 11/1068 (2013.01) [G11C 29/52 (2013.01)] | 16 Claims |
1. A circuit comprising:
a first storage device configured to store a first set of data that includes a first portion and a remainder;
a control circuit coupled to the first storage device and configured to provide a second set of data to overwrite the first portion of the first set of data;
a second storage device configured to store a first error correcting code (ECC) value associated with the first set of data; and
an ECC generation circuit coupled to the control circuit and the second storage device and configured to:
receive the second set of data and the first ECC value;
determine a second ECC value associated with the second set of data and the remainder of the first set of data based on the second set of data and the first ECC value; and
cause the second set of ECC value to be stored in the second storage device.
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