US 11,989,089 B2
Memory controller, operating method thereof, and computing system including the same
Sung Jin Park, Icheon-si (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on Apr. 13, 2022, as Appl. No. 17/659,161.
Claims priority of application No. 10-2021-0094463 (KR), filed on Jul. 19, 2021.
Prior Publication US 2023/0020521 A1, Jan. 19, 2023
Int. Cl. G06F 11/10 (2006.01); G06F 12/02 (2006.01)
CPC G06F 11/1008 (2013.01) [G06F 12/0292 (2013.01); G06F 2212/2022 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A memory controller for controlling a read operation of a memory device, the memory controller comprising:
a map data storage configured to store map data including mapping information between a logical address provided from a host and a physical address mapped to the logical address; and
a read operation controller configured to receive, from the host, a read request and a target logical address corresponding to the read request, acquire a first physical address mapped to the target logical address from the map data, and obtain first data stored at the first physical address of the memory device,
wherein, when an error of the first data is an uncorrectable error, the read operation controller is configured to acquire a second physical address previously mapped to the target logical address before the first physical address, obtain second data stored at the second physical address, and provide the host with the second data and information representing occurrence of the uncorrectable error in response to the read request.