	US 11,988,969 B2
	Dispatch method for production line in semiconductor process, storage medium and semiconductor device
Chin-Chang Huang, Hefei (CN)
Assigned to Changxin Memory Technologies, Inc., Hefei (CN)
Appl. No. 17/442,690
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
PCT Filed May 26, 2021, PCT No. PCT/CN2021/095901 § 371(c)(1), (2) Date Sep. 24, 2021, PCT Pub. No. WO2021/254111, PCT Pub. Date Dec. 23, 2021.
Claims priority of application No. 202010566033.8 (CN), filed on Jun. 19, 2020.
Prior Publication US 2023/0057823 A1, Feb. 23, 2023
Int. Cl. G03F 7/00 (2006.01); G03F 1/70 (2012.01)

CPC G03F 7/70633 (2013.01) [G03F 1/70 (2013.01); G03F 7/70525 (2013.01); G03F 7/70891 (2013.01)]

14 Claims

1. A dispatch method for a production line in a semiconductor process, comprising:

acquiring an overlay error reference curve of a product lot to be exposed in equipment;

setting an overlay error range according to the overlay error reference curve;

acquiring an overlay error for the product lot to be exposed after exposure;

determining whether the overlay error falls into the overlay error range; and

pre-cooling the equipment if the overlay error falls into the overlay error range.