US 11,988,927 B2
Array substrate, method for manufacturing same, and display device
Zhengdong Zhang, Beijing (CN); Xiaofei Yang, Beijing (CN); Lei Su, Beijing (CN); Limiao Wang, Beijing (CN); Hongjun Wang, Beijing (CN); Jia Meng, Beijing (CN); and Xiaoxu Hu, Beijing (CN)
Assigned to Chengdu BOE Optoelectronics Technology Co., Ltd., Sichuan (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
Appl. No. 17/772,531
Filed by Chengdu BOE Optoelectronics Technology Co., Ltd., Sichuan (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
PCT Filed Mar. 9, 2021, PCT No. PCT/CN2021/079786
§ 371(c)(1), (2) Date Apr. 28, 2022,
PCT Pub. No. WO2021/203894, PCT Pub. Date Oct. 14, 2021.
Claims priority of application No. 202010281302.6 (CN), filed on Apr. 10, 2020.
Prior Publication US 2022/0373845 A1, Nov. 24, 2022
Int. Cl. G02F 1/1362 (2006.01); G02F 1/1343 (2006.01)
CPC G02F 1/136213 (2013.01) [G02F 1/136209 (2013.01); G02F 1/136286 (2013.01); G02F 1/134309 (2013.01)] 8 Claims
OG exemplary drawing
 
1. An array substrate, comprising a plurality of sub-pixels; wherein
a storage capacitor and an extended storage capacitor are disposed in each of the plurality of sub-pixels, the extended storage capacitor and the storage capacitor being connected in parallel; and
the array substrate comprises a gate electrode layer, a source and drain electrode layer, and a pixel electrode;
wherein
a first capacitor plate of the storage capacitor is the pixel electrode, and a second capacitor plate of the storage capacitor is a first electrode in the source and drain electrode layer;
a first capacitor plate of the extended storage capacitor is the pixel electrode, a second capacitor plate of the extended storage capacitor is disposed in the source and drain electrode layer, and the second capacitor plate of the extended storage capacitor is connected to the first electrode in the source and drain electrode layer;
the plurality of sub-pixels are arranged in an array, and the source and drain electrode layer comprises a plurality of data lines extending along a column direction; and
two sub-pixels in the same row of sub-pixels are disposed between two adjacent data lines, each of the two sub-pixels comprises an opening region, and second capacitor plates of extended storage capacitors of the two sub-pixels are disposed between two opening regions of the two sub-pixels.