US 11,659,749 B2
Display device
Tohru Okabe, Sakai (JP); Shinsuke Saida, Sakai (JP); Hiroki Taniyama, Sakai (JP); Ryosuke Gunji, Sakai (JP); Shinji Ichikawa, Sakai (JP); Kohji Ariga, Aioi (JP); Akira Inoue, Yonago (JP); Yoshihiro Kohara, Yonago (JP); Koji Tanimura, Yonago (JP); Yoshihiro Nakada, Yonago (JP); and Hiroharu Jinmura, Yonago (JP)
Assigned to SHARP KABUSHIKI KAISHA, Osaka (JP)
Appl. No. 17/54,004
Filed by SHARP KABUSHIKI KAISHA, Sakai (JP)
PCT Filed May 10, 2018, PCT No. PCT/JP2018/018061
§ 371(c)(1), (2) Date Nov. 9, 2020,
PCT Pub. No. WO2019/215863, PCT Pub. Date Nov. 14, 2019.
Prior Publication US 2021/0367027 A1, Nov. 25, 2021
Int. Cl. H10K 59/131 (2023.01); H10K 77/10 (2023.01); H10K 102/00 (2023.01)
CPC H10K 59/1315 (2023.02) [H10K 77/111 (2023.02); H10K 2102/311 (2023.02)] 12 Claims
OG exemplary drawing
 
1. A display device comprising:
a resin substrate;
a TFT layer disposed on the resin substrate, the TFT layer comprising a stack of, in sequence, a first metal film, a first inorganic insulating film, a second metal film, a second inorganic insulating film, a first organic insulating film, a third metal film, and a second organic insulating film;
a light-emitting element disposed on the TFT layer and forming a display region;
a frame region disposed around the display region;
a terminal section disposed at an end of the frame region;
a bending portion extending in one direction between the display region and the terminal section;
a plurality of gate lines forming the TFT layer, the plurality of gate lines extending in parallel with each other in the display region, the plurality of gate lines comprising the first metal film;
a plurality of source lines forming the TFT layer, the plurality of source lines extending, in the display region, in parallel with each other in a direction where the plurality of source lines intersect with the plurality of gate lines, the plurality of source lines comprising the third metal film;
a plurality of first power-source lines forming the TFT layer, the plurality of first power-source lines extending, in the display region, in parallel with each other between the plurality of source lines, the plurality of first power-source lines comprising the third metal film;
a plurality of second power-source lines forming the TFT layer, the plurality of second power-source lines extending, in the display region, in parallel with each other between the plurality of gate lines, the plurality of second power-source lines comprising the second metal film; and
a plurality of routed wires forming the TFT layer, the plurality of routed wires extending, in the frame region, in parallel with each other in a direction intersecting with the one direction where the bending portion extends, the plurality of routed wires comprising the third metal film,
the bending portion including
a slit disposed in the first and second inorganic insulating films,
a first resin layer filling the slit, the first resin layer comprising the first organic insulating film,
the plurality of routed wires disposed on the first resin layer, and
a second resin layer covering the plurality of routed wires, the second resin layer comprising the second organic insulating film,
wherein each of the plurality of first power-source lines and each of the plurality of second power-source lines intersecting with each of the plurality of first power-source lines are electrically connected together via a contact hole disposed in the second inorganic insulating film, and
each of the plurality of source lines and each of the plurality of second power-source lines intersect with each other via the second inorganic insulating film and the first organic insulating film.