US 11,659,702 B2
Bonded semiconductor devices having processor and static random-access memory and methods for forming the same
Jun Liu, Wuhan (CN)
Assigned to YANGTZE MEMORY TECHNOLOGIES CO., LTD., Wuhan (CN)
Filed by YANGTZE MEMORY TECHNOLOGIES CO., LTD., Wuhan (CN)
Filed on Mar. 15, 2021, as Appl. No. 17/202,200.
Application 17/202,200 is a division of application No. 16/669,461, filed on Oct. 30, 2019, granted, now 11,201,157.
Application 16/669,461 is a continuation of application No. PCT/CN2019/105313, filed on Sep. 11, 2019.
Prior Publication US 2021/0202495 A1, Jul. 1, 2021
Int. Cl. H01L 27/11 (2006.01); H01L 21/02 (2006.01); H01L 21/20 (2006.01); H01L 21/822 (2006.01); H01L 25/065 (2023.01); H01L 27/108 (2006.01)
CPC H01L 27/1104 (2013.01) [H01L 21/02013 (2013.01); H01L 21/2007 (2013.01); H01L 21/8221 (2013.01); H01L 25/0657 (2013.01); H01L 27/10894 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for forming a semiconductor device, comprising:
forming a plurality of first semiconductor structures on a first wafer, wherein a first one of the first semiconductor structures comprises a processor free of a cache memory, a second one of the first semiconductor structures comprises a row decoder, and a third one of the first semiconductor structures is a column decoder;
forming a first bonding layer comprising a plurality of first bonding contacts above the plurality of first semiconductor structures;
forming a plurality of second semiconductor structures on a second wafer, wherein at least one of the second semiconductor structures comprises an array of static random-access memory (SRAM) cells free of a decoder circuit;
forming a second bonding layer comprising a plurality of second bonding contacts above the plurality of second semiconductor structures;
bonding the first wafer and the second wafer in a face-to-face manner, such that the row decoder and the column decoder of the first semiconductor structures are electrically coupled to the array of SRAM cells through the first and second bonding contacts, wherein the first bonding contacts are in contact with the second bonding contacts at a bonding interface; and
dicing the bonded first and second wafers into a plurality of dies, wherein at least one of the dies comprises the bonded first and second semiconductor structures.