US 11,659,491 B2
Multiplexing transmit power control information and sidelink data traffic
Lik Hang Silas Fong, Bridgewater, NJ (US); Junyi Li, Fairless Hills, PA (US); Xiaoxia Zhang, San Diego, CA (US); Piyush Gupta, Bridgewater, NJ (US); and Sony Akkarakaran, Poway, CA (US)
Assigned to QUALCOMM Incorporated, San Diego, CA (US)
Filed by QUALCOMM Incorporated, San Diego, CA (US)
Filed on Aug. 2, 2021, as Appl. No. 17/391,461.
Prior Publication US 2023/0030712 A1, Feb. 2, 2023
Int. Cl. H04W 52/14 (2009.01); H04W 52/08 (2009.01); H04W 72/04 (2023.01); H04W 72/1263 (2023.01); H04W 72/12 (2023.01); H04W 92/18 (2009.01)
CPC H04W 52/14 (2013.01) [H04W 52/08 (2013.01); H04W 72/0406 (2013.01); H04W 72/1263 (2013.01); H04W 92/18 (2013.01)] 30 Claims
OG exemplary drawing
 
1. A first user equipment (UE) comprising:
a memory storing processor-readable code; and
at least one processor coupled to the memory, the at least one processor configured to execute the processor-readable code to cause the at least one processor to:
transmit, to a second UE via a sidelink control channel portion of a sidelink communication between the first UE and the second UE, sidelink control information (SCI) that includes a transmit power control (TPC) indicator and a TPC message, wherein the TPC indicator indicates that the SCI and sidelink traffic of the sidelink communication are decoupled; and
transmit, to the second UE via a sidelink traffic channel portion of the sidelink communication, the sidelink traffic for the second UE, wherein the sidelink traffic for the second UE and the SCI are decoupled.