US 11,659,327 B2
Signal processor and signal processing method
Chen Fong Liao, Hsinchu (TW)
Assigned to REALTEK SEMICONDUCTOR CORPORATION, Hsinchu (TW)
Filed by REALTEK SEMICONDUCTOR CORPORATION, Hsinchu (TW)
Filed on Aug. 10, 2021, as Appl. No. 17/398,720.
Claims priority of application No. 110121131 (TW), filed on Jun. 10, 2021.
Prior Publication US 2022/0400340 A1, Dec. 15, 2022
Int. Cl. H04R 3/02 (2006.01); H03F 3/183 (2006.01); H04R 3/04 (2006.01); H03D 7/00 (2006.01)
CPC H04R 3/02 (2013.01) [H03D 7/00 (2013.01); H03F 3/183 (2013.01); H04R 3/04 (2013.01); H03F 2200/03 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A signal processor, configured to decrease a total harmonic distortion plus noise of an output signal generated from an input signal, comprising:
a mixer, configured to generate a mixed signal according to the input signal and a feedback signal;
a pulse-width module, configured to modulate the mixed signal to generate a modulated signal to be outputted from an output terminal of the pulse-width module;
a power stage circuit, configured to amplify the modulated signal to generate an output signal to be outputted from an output terminal of the power stage circuit;
a feedback circuit, configured to generate the feedback signal to the mixer selectively according to the modulated signal or the output signal; and
a control circuit, configured to compare an amplitude of one of the input signal and the mixed signal with a first threshold,
wherein when the amplitude is smaller than the first threshold, the control circuit instructs the feedback circuit to generate the feedback signal according to the modulated signal, and
when the amplitude is greater than or equal to the first threshold, the control circuit instructs the feedback circuit to generate the feedback signal according to the output signal.