US 11,658,678 B2
System and method to enhance noise performance in a delta sigma converter
Abhishek Bandyopadhyay, Winchester, MA (US); Preston S. Birdsong, Medfield, MA (US); and Adam R. Spirer, Westwood, MA (US)
Assigned to Analog Devices, Inc., Wilmington, MA (US)
Filed by Analog Devices, Inc., Wilmington, MA (US)
Filed on Aug. 6, 2021, as Appl. No. 17/395,983.
Claims priority of provisional application 63/063,546, filed on Aug. 10, 2020.
Prior Publication US 2022/0045694 A1, Feb. 10, 2022
Int. Cl. H03M 7/32 (2006.01); H03M 7/36 (2006.01); H03M 3/00 (2006.01)
CPC H03M 7/3011 (2013.01) [H03M 3/368 (2013.01); H03M 3/412 (2013.01); H03M 7/3017 (2013.01); H03M 7/3022 (2013.01); H03M 7/3042 (2013.01)] 20 Claims
OG exemplary drawing
1. A sample-by-sample bypass noise splitter, comprising:
a noise splitting module configured to split an input signal into a plurality of split signals, wherein each of the plurality of split signals is smaller than the input signal, wherein the noise splitting module includes a first multiplexor to process a first output; and
a bypass line configured to pass the input signal directly through to an output line, wherein the bypass line includes a second multiplexor to process a second output and least significant bits of the input signal;
wherein signals above a selected threshold are directed to the noise splitting module and wherein signals below the selected threshold are directed to the bypass line.